A Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits

We present a new lower bound on the number of gates in reversible logic circuits that represent a given reversible logic function, in which the circuits are assumed to consist of general Toffoli gates and have no redundant input/output lines. We make a theoretical comparison of lower bounds, and prove that the proposed bound is better than the previous one. Moreover, experimental results for lower bounds on randomlygenerated reversible logic functions and reversible benchmarks are given. The results also demonstrate that the proposed lower bound is better than the former one. key words: reversible logic circuits, Toffoli gates, lower bound, logic minimization